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NUS6189MN
FUNCTIONAL PIN DESCRIPTIONS
Pin
1
2, 16, 17, 21, 22
3
4, 5, 6, 7
8
9, 11, 13
10
12
14
15
18
19
20
Function
Source 1
Batt
Base
Collector
Emitter
OVP OUT
Gate2
Source 2
V CC
V IN
Gate1
Gnd
Control
Description
This pin is the source of MOSFET1 and connects to the more negative Vsense pin of the PMIC and
to the more negative side of the current sense resistor.
These pins are the drain of MOSFET2 and connect to the battery and the Vbat pin of the PMIC.
The base of the internal bipolar transistor is connected to this pin. It connects to the Charge Control
pin of the PMIC.
The collector of the internal bipolar transistor connects to these pins and should be connected to the
more positive side of the current sense resistor as well as the more positive Vsense pin of the PMIC.
This pin is connected to the emitter of the bipolar transistor. It should be connected externally to the
OVP OUT pins.
These pins are the output of the OVP circuit. Internally they connect to the drain of MOSFET2. These
pins connect externally to the Vcharge pin of the PMIC.
This pin is the gate of MOSFET2. It is not normally connected to external circuitry.
The source of the OVP FET is connected to this pin. This pin needs to be connected to pins 14 & 15.
This pin is the V CC pin of the OVP chip. It needs to be connected to pins 12 and 15.
This pin senses the output voltage of the charger. If the voltage on this input rises above the over-
voltage threshold (V TH ), the OVP OUT pin will be driven to within 1.0 V of V IN , thus disconnecting the
FET. The nominal threshold level is 6.85 V. This pin needs to be connected to pins 12 and 14.
This pin is the gate of MOSFET1. It connects to the Bat FET pin of the PMIC.
This is the ground reference pin for the OVP chip.
This logic signal is used to control the state of OVP OUT and turn ? on/off the P ? channel MOSFET. A
logic level high results in the OVP OUT signal being driven to within 1.0 V of VCC which turns off
MOSFET2. If this pin is not used, it should be connected to ground.
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